蕭錫鍊老師

共 3 筆專利技術

筆直直立奈米線陣列結構及其製造方法 Vertically Oriented Nanostructure and Fabricating Method Thereof

A vertically oriented nanometer-wires structure is disclosed. The vertically oriented nanometer-wires structure includes a non-crystalline base and many straight nanometer-wires. The straight nanometer-wires are uniformly distributed on the non-crystalline base, and the angle between each of the straight nanometer-wire and the non-crystalline base is 80-90 degrees. The straight nanometer-wires structure can be widely applied in semiconductor, optoelectronic, biological and energy field. What is worth to be noticed is that the non-crystalline base can be glass, ceramics, synthetic, resin, rubber or even metal foil, and the straight nanometer-wires and the non-crystalline base are still orthogonal to each other.

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筆直直立奈米線陣列結構及其製造方法 Vertically Oriented Nanostructure and Fabricating Method Thereof

一種筆直直立奈米線陣列製造方法,可在非晶基板上合成筆直直立奈米線陣列結構,進而應用於抗反射表面、場發射顯示器及薄膜太陽能板,藉以提升其效能。本方法主要包括下列步驟:控制氣相沉積環境之一電子濃度及濃度梯度、各種離子濃度及濃度梯度、各種自由基(Radical)濃度、濃度梯度及傳輸方向。控制氣相沉積環境之一長晶熱源方向、基板溫度及基板周遭環境之溫度梯度。控制氣相沉積環境之一電位梯度。

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半導體奈米層狀結構及其製作方法 semiconductor nano layer structure and manufacturing method thereof

       一種合成具有特定功能半導體奈米線結構,進而將具一種或一種以上特定功能半導體奈米線組裝製作成超薄膜片或紙張之製造方法,應用於可捲曲(flexible)半導體電子元件、光電元件、化學感測器、生物感測器、觸控壓力感測器、太陽能電池、熱電晶片、壓電晶片或發電機、電池電極、顯示器、量子電子元件等。此一特定功能奈米線網狀超薄膜片或紙張可以是單獨存在(free standing),也可以與紡織品、紙、塑膠、玻璃、橡膠、高分子聚合物、金屬箔片等可捲曲材料結合,達到輕、薄、耐高溫、熱穩定佳、可捲曲、多功能作用,藉以提升其效能。

       A method for manufacturing a semiconductor nano layer structure includes: two substrates are provided; a plurality of semiconductor nanowires are formed on one of the substrates; an absorption surface is formed on the other substrate; one of the substrates is fixed on a cylindrical roller, the cylindrical roller is brought into contact with a surface of the substrate which is stationary and is not fixed on the cylindrical roller, and rolled with a constant velocity and pressure so that the semiconductor nanowires are break, detached, transferred and absorbed, and a semiconductor nano layer structure is formed on the stationary substrate; a de-laminating process is performed to separate the semiconductor nano layer structure from the second substrate; an electric Joule heat welding process is locally performed to bond each of the semiconductor nanowires of the semiconductor nano layer structure or each semiconductor nano layer structure.

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